Principal Design Engineer (Memory Logic) - #390363

Western Digital


Date: 08/19/2021 21:00 PM

City: Milpitas, California

Contract type: Full Time

Work schedule: Full Day

Company Description

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon.

We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Western Digital is fueling a brighter, smarter future.

Binge-watch any shows, use social media or shop online lately? You’ll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too.

We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital®, G-Technology™, SanDisk® and WD® brands.

Today’s exceptional challenges require your unique skills. It’s You & Western Digital. Together, we’re the next BIG thing in data.

Job Description

The Memory Technology Group is at the core of the Legacy SanDisk Engineering Organization which Western Digital owns. We are building a cutting edge 3D memory in our multiple billion dollars Fab. Our memory provides performance, power, and endurance at a lower cost but on quality. The Memory Technology organization is a strategic entity for the company, and we are growing. Our group functions as a start-up within WDC, and offers a creative, fast paced, entrepreneurial work environment where you’ll be at the center of WDC innovation.

We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory Design team. This is a great opportunity for a results-oriented, entrepreneurial individual who knows how to work with non-volatile memory world-class engineers and who has a great track record for delivering innovative results.


You will need to think creatively about the memory as we do take pride in our craftsmanship.  We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company.

In this position, the individual will be responsible for all aspects of digital design in NAND Flash memory, focusing on micro architecture, RTL design, verification, logic synthesis, and timing analysis to deliver a design meeting target power, performance and area goals.

ESSENTIAL DUTIES AND RESPONSIBILITIES: 

  • RTL design and verification in Verilog, RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT, timing analysis and closure
  • Balance design trade-offs with modularity, scalability, power, area, and performance.
  • Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
  • Participating in Post-Si evaluation and debug
  • Drive cross function support for productization
  • Technical guidance and mentoring of junior engineers

Qualifications

REQUIRED:

  • MSEE plus 6 years of relevant experience
  • Experience with chip level integration, chip lead, and full product life cycle (requirements, design, implementation, test) of Logic design
  • Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, static timing analysis, physical verification)
  • Working knowledge of NAND flash memory cell device operations, algorithms for program/read/erase
  • Excellent communication (written and verbal) and interpersonal skills

PREFERRED:

  • Experience developing digital circuit designs for low power operating conditions
  • Working knowledge of device physics and process
  • Working knowledge of NAND Flash memory design including Analog, Core, Datapath and IO circuits
  • Proficiency with following Digital design tools
    • Synthesis - Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler
    • Static Timing - Synopsys Primetime or Cadence Tempus
    • Place and Route - Synopsys ICC or Cadence Encounter or Innovus
  • Familiarity with revision control tool and EDA standard formats used in cell/library development and modeling - Liberty (timing model), SDC (Synopsys Design Constraints)
  • Programming experience in C, C++, Python or Per

The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people. A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadlines. Excellent communication (written and verbal) and interpersonal skills.

Additional Information

Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster.

Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [email protected] to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

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